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PLL103-11
Low Skew Buffers
FEATURES
* * * * * * * * * * Generates 13 copies of High-speed clock inputs. Supports up to three SDRAM DIMMS synchronous clocks. Supports 2-wire I2C serial bus interface with readback. 50% duty cycle with low jitter. Less than 5ns delay. Skew between any outputs is less than 250 ps. Tri-state pin for testing. Frequency up to 150 MHz. 3.0V-3.7V Supply range. Available in 28-pin 300mil SOIC package.
PIN CONFIGURATION
VDD SDRAM0 SDRAM1 GND VDD SDRAM2 SDRAM3 GND BUF_IN SDRAM4 SDRAM5 SDRAM12 VDD1 SDATA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VDD SDRAM11 SDRAM10 GND VDD SDRAM9 SDRAM8 GND VDD SDRAM7 SDRAM6 GND GND1 SCLK
PLL103-11
BLOCK DIAGRAM
SDRAM0 SDATA SCLK I2C Control SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 BUF_IN SDRAM7 SDRAM8 SDRAM9 SDRAM10 SDRAM11 SDRAM12 SDRAM1
POWER GROUP
* * VDD: SDRAM (0:12) VDD1: I2C Circuitry
GROUND GROUP
* * GND: SDRAM (0:12) GND1: I2C Circuitry
KEY SPECIFICATIONS
* * * * BUF_IN to SDRAM outputs Delay: 1 ~ 5 ns. Output Slew: 1.5 V/ns. Output Skew: 250 ps. Output Duty Cycle: 50% 5%.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 11/07/00 Page 1
PLL103-11
Low Skew Buffers
PIN DESCRIPTIONS
Name
SDRAM (0:5) SDRAM (6:11) SDRAM 12 BUF_IN SDATA SCLK VDD VDD1 GND GND1
Number
2,3,6,7,10,11 18,19,22, 23,26,27 12 9 14 15 1,5,20,24,28 13 4,8,17,21,25 16
Type
O O O I B I P P P P SDRAM Byte0 Clock outputs. SDRAM Byte1 Clock outputs. SDRAM Byte2 Clock outputs.
Description
Input for fanout buffers SDRAM (0:12). Serial data inputs for serial interface port. 3.3V Power supply for SDRAM buffer. 3.3V Power supply for I2C circuitry. Ground for SDRAM buffer. Power supply for I2C circuitry.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 11/07/00 Page 2
PLL103-11
Low Skew Buffers
I2C BUS CONFIGURATION SETTING
Address Assignment Slave Receiver/Transmitter Data Transfer Rate A6 1 A5 1 A4 0 A3 1 A2 0 A1 0 A0 1 R/W _
Provides both slave write and readback functionality Standard mode at 100kbits/s This serial protocol is designed to allow both blocks write and read from the controller. The bytes must be accessed in sequential order from lowest to highest byte. Each byte transferred must be followed by 1 acknowledge bit. A byte transferred without acknowledged bit will terminate the transfer. The write or read block both begins with the master sending a slave address and a write condition (0xD2) or a read condition (0xD3). Following the acknowledge of this address byte, in Write Mode: the Command Byte and Byte Count Byte must be sent by the master but ignored by the slave, in Read Mode: the Byte Count Byte will be read by the master then all other Data Byte. Byte Count Byte default at power-up is = (0x09).
Data Protocol
I2C CONTROL REGISTERS
1. BYTE 0: SDRAM(0:5) Clock Register (1=Enable, 0=Disable) Bit
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Pin#
11 10 7 6 3 2
Default
1 1 1 1 1 1 1 1
Description
SDRAM5 (Active/Inactive) SDRAM4 (Active/Inactive) Reserved Reserved SDRAM3 (Active/Inactive) SDRAM2 (Active/Inactive) SDRAM1 (Active/Inactive) SDRAM0 (Active/Inactive)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 11/07/00 Page 3
PLL103-11
Low Skew Buffers
2. BYTE 1: SDRAM(6:11) Clock Register (1=Enable, 0=Disable) Bit
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Pin#
27 26 23 22 19 18
Default
1 1 1 1 1 1 1 1
Description
SDRAM11 (Active/Inactive) SDRAM10 (Active/Inactive) SDRAM9 (Active/Inactive) SDRAM8 (Active/Inactive) Reserved Reserved SDRAM7 (Active/Inactive) SDRAM6 (Active/Inactive)
3. BYTE 2: SDRAM12 Clock Register (1=Enable, 0=Disable) Bit
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Pin#
12 -
Default
1 1 1 1 1 1 1 1
Description
Reserved SDRAM12 (Active/Inactive) Reserved Reserved Reserved Reserved Reserved Reserved
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 11/07/00 Page 4
PLL103-11
Low Skew Buffers
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings PARAMETERS
Supply Voltage Input Voltage, dc Output Voltage, dc Storage Temperature Ambient Operating Temperature
SYMBOL
V DD VI VO TS TA
MIN.
V SS -0.5 V SS -0.5 V SS -0.5 -65 0
MAX.
7.0 V DD +0.5 V DD +0.5 150 70
UNITS
V V V C C
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied.
2. AC/DC Electrical Specifications PARAMETERS
Input High Current Input Low Current Input High Voltage Input Low Voltage Input Frequency Input Capacitance
SYMBOL
IIH IIL IIL VIH VIL FIN CIN IDD1 IDD2 VIN = VDD
CONDITIONS
VIN=0V; with no pull-up resistors VIN=0V; with 100k pull-up resistors
MIN.
TYP.
MAX.
5
UNITS
uA uA uA
2 VSS-0.3 VDD=3.3V; All outputs loaded Logic Inputs CL= 0pf @ 66MHz CL= 0pf @ 100MHz CL= 30pf; RS= 33 @ 66MHz CL= 30pf; RS= 33 @ 100MHz Stopped, input at 0 or VDD 80 120 180 240 10
VDD+0.3 0.8 150 5 120 180 260 360 500
V V MHz pF mA mA mA mA uA
Operating Supply Current
IDD3 IDD4 IDD5
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 11/07/00 Page 5
PLL103-11
Low Skew Buffers
2. Output Buffer Electrical Specifications
Unless otherwise stated, all power supplies = 3.3V5%, and ambient temperature range TA= 0C to 70C
PARAMETERS
Output High Voltage Output Low Voltage Output High Current Output Low Current Output Impedance Output Impedance Rise Time Fall Time Skew Duty Cycle Propagation
SYMBOL
VOH VOL IOH IOL RDSP RDSN Tr Tf Tskew DT TPROP TPROPEN TPROPDIS
CONDITIONS
IOH = -36 mA IOH = 23 mA VOH = 2.0 V VOL = 0.8 V VO = (0.5) VDD VO = (0.5) VDD VOL = 0.4 V, VOH = 2.4V VOH = 2.4 V, VOL = 0.4V VT = 1.5 V VT = 1.5 V VT = 1.5 V VT = 1.5 V VT = 1.5 V
MIN.
2.4
TYP.
3 0.27 -115
MAX.
0.4 -54 24 24
UNITS
V V mA mA ohm ohm ns ns ps % ns ns ns
40 10 10
57
0.95 0.95 110 45 1 1 1 50 5
1.33 1.33 250 55 6 8 8
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 11/07/00 Page 6
PLL103-11
Low Skew Buffers
PACKAGE INFORMATION
0.400 - 0.410 10.160 - 10.414
0.292 - 0.299 7.417 - 7.959
0.014 - 0.019 0.356 - 0.483 0.015 (0.381) 0.009 - 0.012 (0.229 - 0.305) 45 0 0.701 - 0.711 (17.81 - 18.06)
0.050 1.27 0.088 - 0.096 (2.235 - 2.438)
0.097 - 0.104 (2.464 - 2.642) 30-60 0.050 MIN (1.27) 0.005 - 0.0115 (0.127 - 0.2921)
28 PIN SOIC
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following: Device number, Package type and Operating temperature range
PLL103-11 S C
PART NUMBER TEMPERATURATURE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE S=SOIC
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by PhaseLink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 11/07/00 Page 7

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